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-rw-r--r--src/components/device_bus.rs (renamed from src/device_bus.rs)13
-rw-r--r--src/components/mod.rs8
-rw-r--r--src/components/processor.rs (renamed from src/processor.rs)19
-rw-r--r--src/components/program_memory.rs (renamed from src/program_memory.rs)5
-rw-r--r--src/components/stack.rs (renamed from src/stack.rs)4
-rw-r--r--src/lib.rs19
-rw-r--r--src/signal.rs8
7 files changed, 38 insertions, 38 deletions
diff --git a/src/device_bus.rs b/src/components/device_bus.rs
index 6a04f66..9854ee9 100644
--- a/src/device_bus.rs
+++ b/src/components/device_bus.rs
@@ -1,5 +1,13 @@
use crate::*;
+
+pub trait DeviceBus {
+ fn read(&mut self, port: u8) -> u8;
+ fn write(&mut self, port: u8, value: u8) -> Option<Signal>;
+ fn wake(&mut self) -> bool;
+}
+
+
pub trait Device {
fn read(&mut self, port: u8) -> u8;
fn write(&mut self, port: u8, value: u8) -> Option<Signal>;
@@ -12,8 +20,3 @@ impl Device for () {
fn wake(&mut self) -> bool { false }
}
-pub trait DeviceBus {
- fn read(&mut self, port: u8) -> u8;
- fn write(&mut self, port: u8, value: u8) -> Option<Signal>;
- fn wake(&mut self) -> bool;
-}
diff --git a/src/components/mod.rs b/src/components/mod.rs
new file mode 100644
index 0000000..f922bcc
--- /dev/null
+++ b/src/components/mod.rs
@@ -0,0 +1,8 @@
+mod device_bus;
+mod processor;
+mod program_memory;
+mod stack;
+
+pub use device_bus::*;
+pub use program_memory::*;
+pub use stack::*;
diff --git a/src/processor.rs b/src/components/processor.rs
index 2934e11..d5d343d 100644
--- a/src/processor.rs
+++ b/src/components/processor.rs
@@ -1,6 +1,5 @@
-use emulator::BedrockEmulator;
-
use crate::*;
+
use std::ops::*;
@@ -76,12 +75,12 @@ impl <DB: DeviceBus> BedrockEmulator<DB> {
}
macro_rules! shf {
($x:expr,$y:expr) => {
- { split!($y=>l,r); $x.checked_shr(r as u32).unwrap_or(0).checked_shl(l as u32).unwrap_or(0) }
+ { split!($y=>l,r); $x.checked_shl(l as u32).unwrap_or(0).checked_shr(r as u32).unwrap_or(0) }
};
}
macro_rules! shc {
($x:expr,$y:expr) => {
- { split!($y=>l,r); $x.rotate_right(r as u32).rotate_left(l as u32) }
+ { split!($y=>l,r); $x.rotate_left(l as u32).rotate_right(r as u32) }
};
}
@@ -156,7 +155,7 @@ impl <DB: DeviceBus> BedrockEmulator<DB> {
/* TAL* */ 0x3E => { WPOPD!(x); WPSH1!(x.count_ones() as u8); }
/* REV* */ 0x3F => { WPOPD!(x); WPSHD!(x.reverse_bits()); }
- /* DB1 */ 0x40 => { if debug { return Some(Signal::Debug1); } }
+ /* DB1 */ 0x40 => { if debug { return Some(Signal::Debug(Debug::Debug1)); } }
/* JMP: */ 0x41 => { MLITD!(a); PCSET!(a); }
/* JCN: */ 0x42 => { MLITD!(a); WPOP1!(t); if t!=0 {PCSET!(a)}; }
/* JCK: */ 0x43 => { MLITD!(a); WGET1!(t); if t!=0 {PCSET!(a)}; }
@@ -189,7 +188,7 @@ impl <DB: DeviceBus> BedrockEmulator<DB> {
/* TAL: */ 0x5E => { MLIT1!(x); WPSH1!(x.count_ones() as u8); }
/* REV: */ 0x5F => { MLIT1!(x); WPSH1!(x.reverse_bits()); }
- /* DB2 */ 0x60 => { if debug { return Some(Signal::Debug2); } }
+ /* DB2 */ 0x60 => { if debug { return Some(Signal::Debug(Debug::Debug2)); } }
/* JMS: */ 0x61 => { MLITD!(a); RPSHD!(self.core.mem.pc); PCSET!(a); }
/* JCS: */ 0x62 => { MLITD!(a); WPOP1!(t); if t!=0 {RPSHD!(self.core.mem.pc); PCSET!(a)}; }
/* JCK*: */ 0x63 => { MLITD!(a); WGETD!(t); if t!=0 {PCSET!(a)}; }
@@ -222,7 +221,7 @@ impl <DB: DeviceBus> BedrockEmulator<DB> {
/* TAL*: */ 0x7E => { MLITD!(x); WPSH1!(x.count_ones() as u8); }
/* REV*: */ 0x7F => { MLITD!(x); WPSHD!(x.reverse_bits()); }
- /* DB3 */ 0x80 => { if debug { return Some(Signal::Debug3); } }
+ /* DB3 */ 0x80 => { if debug { return Some(Signal::Debug(Debug::Debug3)); } }
/* JMPr */ 0x81 => { RPOPD!(a); PCSET!(a); }
/* JCNr */ 0x82 => { RPOPD!(a); RPOP1!(t); if t!=0 {PCSET!(a)}; }
/* JCKr */ 0x83 => { RPOPD!(a); RGET1!(t); if t!=0 {PCSET!(a)}; }
@@ -255,7 +254,7 @@ impl <DB: DeviceBus> BedrockEmulator<DB> {
/* TALr */ 0x9E => { math!(RGETV!(1); TAL); }
/* REVr */ 0x9F => { math!(RGETV!(1); REV); }
- /* DB4 */ 0xA0 => { if debug { return Some(Signal::Debug4); } }
+ /* DB4 */ 0xA0 => { if debug { return Some(Signal::Debug(Debug::Debug4)); } }
/* JMSr */ 0xA1 => { RPOPD!(a); WPSHD!(self.core.mem.pc); PCSET!(a); }
/* JCSr */ 0xA2 => { RPOPD!(a); RPOP1!(t); if t!=0 {WPSHD!(self.core.mem.pc); PCSET!(a)}; }
/* JCKr* */ 0xA3 => { RPOPD!(a); RGETD!(t); if t!=0 {PCSET!(a)}; }
@@ -288,7 +287,7 @@ impl <DB: DeviceBus> BedrockEmulator<DB> {
/* TALr* */ 0xBE => { RPOPD!(x); RPSH1!(x.count_ones() as u8); }
/* REVr* */ 0xBF => { RPOPD!(x); RPSHD!(x.reverse_bits()); }
- /* DB5 */ 0xC0 => { if debug { return Some(Signal::Debug5); } }
+ /* DB5 */ 0xC0 => { if debug { return Some(Signal::Debug(Debug::Debug5)); } }
/* JMPr: */ 0xC1 => { MLITD!(a); PCSET!(a); }
/* JCNr: */ 0xC2 => { MLITD!(a); RPOP1!(t); if t!=0 {PCSET!(a)}; }
/* JCKr: */ 0xC3 => { MLITD!(a); RGET1!(t); if t!=0 {PCSET!(a)}; }
@@ -321,7 +320,7 @@ impl <DB: DeviceBus> BedrockEmulator<DB> {
/* TALr: */ 0xDE => { MLIT1!(x); RPSH1!(x.count_ones() as u8); }
/* REVr: */ 0xDF => { MLIT1!(x); RPSH1!(x.reverse_bits()); }
- /* DB6 */ 0xE0 => { if debug { return Some(Signal::Debug6); } }
+ /* DB6 */ 0xE0 => { if debug { return Some(Signal::Debug(Debug::Debug6)); } }
/* JMSr: */ 0xE1 => { MLITD!(a); WPSHD!(self.core.mem.pc); PCSET!(a); }
/* JCSr: */ 0xE2 => { MLITD!(a); RPOP1!(t); if t!=0 {WPSHD!(self.core.mem.pc); PCSET!(a)}; }
/* JCKr*: */ 0xE3 => { MLITD!(a); RGETD!(t); if t!=0 {PCSET!(a)}; }
diff --git a/src/program_memory.rs b/src/components/program_memory.rs
index 7ffdb17..bcfbcae 100644
--- a/src/program_memory.rs
+++ b/src/components/program_memory.rs
@@ -11,11 +11,6 @@ impl ProgramMemory {
}
}
- pub fn reset(&mut self) {
- self.mem.fill(0);
- self.pc = 0;
- }
-
pub fn load_program(&mut self, bytecode: &[u8]) {
let length = std::cmp::min(bytecode.len(), 65536);
self.mem[..length].copy_from_slice(&bytecode[..length]);
diff --git a/src/stack.rs b/src/components/stack.rs
index ab18cca..bbd7b68 100644
--- a/src/stack.rs
+++ b/src/components/stack.rs
@@ -11,10 +11,6 @@ impl Stack {
}
}
- pub fn reset(&mut self) {
- self.sp = 0;
- }
-
pub fn push_u8(&mut self, val: u8) {
self.mem[self.sp as usize] = val;
self.sp = self.sp.wrapping_add(1);
diff --git a/src/lib.rs b/src/lib.rs
index f8fa3d6..19428bc 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -1,19 +1,12 @@
-mod processor;
-mod program_memory;
-mod stack;
-
-pub use program_memory::ProgramMemory;
-pub use stack::Stack;
-
+mod components;
mod core;
-mod device_bus;
-mod signal;
mod emulator;
+mod signal;
-pub use core::BedrockCore;
-pub use device_bus::{Device, DeviceBus};
-pub use signal::Signal;
-pub use emulator::BedrockEmulator;
+pub use components::*;
+pub use core::*;
+pub use emulator::*;
+pub use signal::*;
pub mod macros {
diff --git a/src/signal.rs b/src/signal.rs
index 9959901..2a97180 100644
--- a/src/signal.rs
+++ b/src/signal.rs
@@ -1,8 +1,14 @@
-#[derive(Copy, Clone, Debug)]
+#[derive(Copy, Clone, Debug, PartialEq)]
pub enum Signal {
+ Interrupt,
Sleep,
Fork,
Halt,
+ Debug(Debug),
+}
+
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum Debug {
Debug1,
Debug2,
Debug3,
generated by cgit v1.2.3-70-g09d2 (git 2.49.0) at 2025-04-20 10:07:48 +0000