Implement memory device

The memory device is fully implemented, with 3MB of heap memory.

This commit is a bit messy, additional changes are:
- The program memory and program counter in each Bedrock struct have
  been moved to a dedicated struct to prevent a name collision with the
  memory device
- The run_bg and debug functions have been moved to core.c and debug.c
- The blank screen colour has been changed back to black
- No second program runs on the sub screen by default
- The number of Bedrock instances to run has been parameterized

1 files changed, 46 insertions, 1 deletions

diff --git a/arm9/source/core.c b/arm9/source/core.c
index cb112e0..66bd204 100644
--- a/arm9/source/core.c
+++ b/arm9/source/core.c
@@ -1,6 +1,7 @@
 #include <nds.h>
 #include "bang.h"
 #include "core.h"
+#include "debug.h"
 
 
 void reset_br(Bedrock *br) {
@@ -10,12 +11,24 @@ void reset_br(Bedrock *br) {
 // Load a program into an instance.
 void start_br(Bedrock *br, u8 program[], int size) {
     reset_br(br);
-    memcpy(&br->mem, program, size);
+    memcpy(&br->prg.mem, program, size);
     br->alive = TRUE;
     br->awake = TRUE;
     // br->scr.nds = &scr_main;
 }
 
+void run_br(Bedrock *br) {
+    if (br->awake) {
+        switch (evaluate(br, 1000)) {
+        case SIG_HALT:   br->alive = FALSE; black_screen(br->scr.nds); br = NULL; return;
+        case SIG_SLEEP:  br->awake = FALSE;            return;
+        case SIG_DB1:     debug_stacks(br);            return;
+        case SIG_DB4:     debug_assert(br);            return;
+        default:                                       return;
+        }
+    }
+}
+
 void rouse_br(Bedrock *br) {
     if (TEST(br->sys.sleep, 0x8000)) {  // SYSTEM
         br->awake = TRUE;
@@ -53,6 +66,21 @@ u8 dev_read(Bedrock *br, u8 port) {
     // TODO: available devices
     case 0x0A: return br->sys.wake;
 
+// MEMORY DEVICE
+    case 0x10: return mem_read1(&br->mem);
+    case 0x11: return mem_read1(&br->mem);
+    case 0x12: return HIGH(br->mem.offset1);
+    case 0x13: return  LOW(br->mem.offset1);
+    case 0x14: return      br->mem.page1;
+    case 0x15: return      br->mem.byte1;
+    case 0x16: return HIGH(br->mem.count);
+    case 0x17: return  LOW(br->mem.count);
+    case 0x18: return mem_read2(&br->mem);
+    case 0x19: return mem_read2(&br->mem);
+    case 0x1A: return HIGH(br->mem.offset2);
+    case 0x1B: return  LOW(br->mem.offset2);
+    case 0x1C: return      br->mem.page2;
+    case 0x1D: return      br->mem.byte2;
 // MATH DEVICE
     case 0x20: return HIGH(br->math.op1);
     case 0x21: return  LOW(br->math.op1);
@@ -117,6 +145,23 @@ Signal dev_write(Bedrock *br, u8 port, u8 v) {
 // SYSTEM DEVICE
     case 0x08: SET_HIGH(br->sys.sleep,v);          return 0;
     case 0x09:  SET_LOW(br->sys.sleep,v);  return SIG_SLEEP;
+// MEMORY DEVICE
+    case 0x10: mem_write1(&br->mem,v);                                  return 0;
+    case 0x11: mem_write1(&br->mem,v);                                  return 0;
+    case 0x12: SET_HIGH(br->mem.offset1,v); mem_load_cache1(&br->mem);  return 0;
+    case 0x13:  SET_LOW(br->mem.offset1,v); mem_load_cache1(&br->mem);  return 0;
+    case 0x14: br->mem.page1=v; mem_get_page1(&br->mem);                return 0;
+    case 0x15: br->mem.byte1=v;                                         return 0;
+    case 0x16: SET_HIGH(br->mem.count_write,v);                         return 0;
+    case 0x17:  SET_LOW(br->mem.count_write,v); mem_allocate(&br->mem); return 0;
+    case 0x18: mem_write2(&br->mem,v);                                  return 0;
+    case 0x19: mem_write2(&br->mem,v);                                  return 0;
+    case 0x1A: SET_HIGH(br->mem.offset2,v); mem_load_cache2(&br->mem);  return 0;
+    case 0x1B:  SET_LOW(br->mem.offset2,v); mem_load_cache2(&br->mem);  return 0;
+    case 0x1C: br->mem.page2=v; mem_get_page2(&br->mem);                return 0;
+    case 0x1D: br->mem.byte2=v;                                         return 0;
+    case 0x1E: SET_HIGH(br->mem.copy_write,v);                          return 0;
+    case 0x1F:  SET_LOW(br->mem.copy_write,v); mem_do_copy(&br->mem);   return 0;
 // MATH DEVICE
     case 0x20: set_op1_high(&br->math,v);          return 0;
     case 0x21: set_op1_low( &br->math,v);          return 0;